参考设计
(13)
Ultrasonic Distance Measurement BoosterPack Reference Design
TIDA-00462: The TIDA-00462 ultrasonic distance measurement reference design can measure the distance up to 99 inches with an accuracy of ±1.5 inches. The scope of this design guide is to give system designers a head-start in integrating TI’s industrial ultra-low-power MCU, analog signal conditioning, and power management technologies into their end-equipment systems. This design guide describes the principle of operation and basic design process for a low cost distance measuring system based on ultrasonic sound utilizing the MSP430 ultralow-power microcontroller. This design guide also addresses component selection, design theory, and test results of the TI Design system. All the relevant design files like Schematics, BOM, Layer plots, Altium files, Gerber and MSP430 MCU firmware are provided.
Altera Arria V GX FPGA Power Solution Reference Design
PMP9449: The PMP9449 reference design provides all the power supply rails necessary to power Altera's Arria® V GX family of FPGAs. It utilizes a TPS38600 to monitor the input supply and provide power on sequencing. This design features low cost, small footprint discrete ICs and is powered from a single 5V input.
Data Acquisition for MUX and Step Inputs, 18 bits, 1uS Full Scale Response Reference Design
TIPD112: This TI Verified Design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide 18-bit settling performance for a Full Scale Step Input signal, thus leading to excellent system linearity. Such an input stimulus is more applicable in MUXed applications for transition between channels with different input voltages. The input driver for the ADC uses the OPA350 for high bandwidth (small & large signal), output current drive and linear rail-to-rail input and output operation. The reference buffer drive utilizes a composite buffer made out of THS4281 & OPA333 to get the desired performance at lowest power consumption. This DAQ block achieves a ±2.5LSB INL performance for a total power consumption of less than 70mW. See more TI Precision Designs
Precision Full-Wave Rectifier, Dual-Supply
TIPD139: This TI Precision Verified Design provides the theory, component selection, simulation, PCB design, and measured results for a dual-supply precision full-wave rectifier. The design functions over a wide power supply range (up to +/-18V) allowing full-wave rectification of a wide range of input signals. This implementation operates with limited distortion for 20 Vpp input signals at frequencies up to 50 kHz and for signals as small as 50 mVpp at frequencies up to 1 kHz. The circuit can be used in applications that need to quantify the absolute value of input signals which have both positive and negative polarities. The OPA2211 provides excellent noise and distortion performance making it ideal for precision applications.
Optimizing LMH6554 to Drive High Speed ADCs
TIDA-00092: This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both AC and DC coupled applications while interfaced to the ADS4449 quad, 250-MSPS, 14-bit ADC. Various options for common-mode voltages, power supplies, and interfaces are discussed and measured to meet the requirements of a variety of applications. Anti-aliasing filter examples are shown along with the performance improvements that they provide.
Dual-Wideband RF-to-Digital Receiver Design
TIDA-00073: The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249, LMH6521, LMK0480x, and a dual mixer to achieve this. This reference EVEM coupled with a capture card such as the TSW1400 can be used to capture and analyze narrow band and wideband signals. Instructions are provided on how to change the LO and IF frequencies for different application needs. The TIDA-00073 was implemented with hardware from the TSW1265EVM.
1-GHz Bandwidth Dual Channel Transmitter up to 4-GHz Reference Design
TIDA-00409: The TSW38J84 EVM reference design provides a platform to demonstrate a wideband dual transmit solution that incorporates an integrated LO. The reference design utilizes the 2.5 GSPS DAC38J84 device with the high performance modulators: TRF3722 (including integrated PLL/VCO) and TRF3705. The TRF3722 and TRF3705 can be combined to form a dual transmit solution with the TRF3722 generating the local oscillator (LO) for both modulators. The interface between the DAC38J84 and the modulators is discussed as well as measurements showing the combined performance of the DAC and modulators. The measurements illustrate the bandwidth performance, output third order intercept performance, harmonic distortion and sideband suppression performance.
Wide-Bandwidth and High-Voltage Arbitrary Waveform Generator Front End
TIDA-00075: This design shows how to use an active interface with the current sink output of the DAC5682Z - typical applications for this include front ends for arbitrary waveform generators. The EVM includes the DAC5682Z for digital-to-analog conversion, an OPA695 to demonstrate an active interface implementation using a wide bandwidth operational amplifier and a THS3091 and THS3095 to showcase an operational amplifier with large voltage swing. Also included on board are a CDCM7005, VCXO and Reference for clock generation, and linear regulators for voltage regulation. Communication to the EVM is accomplished via a USB interface and GUI software.
Synchronizing Multiple JESD204B ADCs for Emitter Position Location Reference Design
TIDA-00467: A common technique to estimate the position of emitters uses the amplitude and phase shift data of a signal derived from an array of spatially distributed sensors. For such systems, it is important to guarantee a deterministic phase relationship between the sensors to minimize errors in the actual measured data. This application design will discuss how multiple Analog to Digital Converters (ADCs) with a JESD204B interface can be synchronized so that the sampled data from the ADCs are phase aligned.
Digitally Tunable MDAC Based State Variable Filter Reference Design
TIPD160: This MDAC based state variable filter offers highly accurate digital tuning of gain, center/cut off frequency, and quality factor. This circuit provides three separate filter outputs: low pass, band pass, and high pass that can be accessed simultaneously. This circuit is suitable for a broad range of applications requiring accurate digital filter tuning from audio to industrial and more!
Low-Side V-I Converter Reference Design, 0 to 5 V Input, 0 mA to 500 mA Output
TIPD101: This Verified Design provides the theory, component selection, simulation, PCB design, and measurement details for a low-side voltage-to-current (V-I) converter. The circuit delivers a well-regulated current to a floating load which could include actuators, sensors, motors, LEDs, and many other applications. The design uses the OPA735 small-signal op amp to control an NPN emitter-follower that sources current to the load. The current is accurately regulated by feeding back the voltage drop across a low-side current-sense resistor to the op amp. The rail-to-rail input/output topology of the OPA735 allows for good accuracy even at low currents because there is very little "dead-zone" in either the input or output stage. The auto-zero zero-drift technology in the OPA735 allows for great DC performance over temperature. See more TI Precision Designs
Direct Down-Conversion System with I/Q Correction
TIDA-00078: The I/Q Correction block implemented in the Field Programmable Gate Array (FPGA) of the TSW6011EVM helps users to adopt a direct down conversion receiver architecture in a wireless system. The I/Q correction block consists of a single-tap blind algorithm, which corrects the frequency-independent I/Q imbalance in a complex zero-IF receiver system. Along with the I/Q correction block, the FPGA includes a digital gain block, a digital power-measurement block, x2 of interpolation block, an I/Q offset correction block, and a quadrature mixing block.
