PE-68386NL中文资料_PDF数据手册

PE-68386NL

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Pulse Electronics

Pulse Transformer, GATE DRIVE Application(s), 1:1, ROHS COMPLIANT

技术详情

价格 & 库存

详细参数

不含铅

符合

Active

ROHS COMPLIANT

compliant

EAR99

9 weeks

0.67

GATE DRIVE

9.7 V-us

2.5 mm

1500 V

8.6 mm

0.6 Ω

SURFACE MOUNT

50 kHz

130 °C

-40 °C

TUBE

785 µH

YES

PULSE TRANSFORMER

1:1

6.7 mm

参考设计

(2)

Universal Digital Interface to Absolute Position Encoders Reference Design

TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor to run the master protocol. The design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.

Two-Wire Interface to a HIPERFACE DSL Encoder Reference Design

TIDA-00177: The TIDA-00177 reference design is an EMC compliant industrial interface to a two-wire HIPERFACE DSL encoder. Applications include industrial servo drives. The design features a 3.3-V supply RS485 transceiver and line termination and coupling for encoder power over RS485 as per HIPERFACE DSL specification. The design has been tested up to 100m cable length with an integrated cable, where the encoder’s two-wire twisted pair was integrated in the same motor cable. The encoder connector output is protected against over-voltage and short circuit to prevent damage to an encoder or during a cable short. The design features an industrial compliant 24-V input with wide range from 18-36V. A 3.3V I/O connector with logic signals for easy interface to a host processor with HIPERFACE DSL Master IP Core is made available.

< / 共 2 个参考设计 >

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